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Cheating quantum tunneling

An illustration of a single-molecule device that blocks leakage current in a transistor (yellow: gold transistor electrodes) Credit: Haixing Li/Columbia Engineering

Chip manufacturing technology has reached the single digit nanoscale and is now facing the quantum mechanical tunneling: basically you have to  imagine that the electron is not a particle but a wave and as such it is not in a specific location but it is spread out in space (particle-wave duality in quantum mechanics). When you consider the electron as wave you see that it can be both on one side of a boundary, like an insulating material surface, and on the other side. The closer the insulating surface is to the atomic nucleus the more likely that the electronic “wave” extends to the other side of the surface. This phenomenon, predicted by quantum mechanics is very real, not just a figment of your imagination. This is what leads some electrons to “jump” across an insulating surface and leak outside. This is what creates the leakage current and that is twice as bad: on the one hand a transistor will use power even when it shouldn’t (the leakage current consumes power) and on the other hand you detect a current that is not the result of conductivity (like signalling the presence of a “1”) but it is just the result of weak insulation.

The problem is that whatever material you use for insulator if the distance between the two electrodes (conducting components) in a transistor is smaller than a few nm you get this leakage. It is not about having a good insulator, it is about the fundamental wave property of the electrons that it is present at both sides of the insulating wall (I hope that this not 100% correct explanation can give the idea of what is going on, see the clip for a graphic explanation of quantum tunneling).

Because of this quantum nature of the electron researchers thought that the quantum tunneling would place a “de facto” limit to the scaling down of a transistor size (as you shrink the distance between the electrodes you exponentially increase the probability of the leakage current).

Now teams of researchers at the Columbia University (US) and Shanghai University (China) have found a way to circumvent the problem, effectively blocking the leakage current. How could this be?

They have discovered a single molecule layer that can interfere with the electron’s wave, basically creating an opposing wave that flattens out the presence at the material surface. It is not stopping the presence of the electron wave on the other side of the surface, this is a physical impossibility, but by creating an opposing wave the net result is the absence of the electronic wave on the other side of the insulating layer. Since this is done using a single molecule layer they have demonstrated that it is possible to have an effective insulation at the single nanoscale level, actually even in the range of a few angstrom level!

This is interesting because it addresses the leakage current problem in today’s transistors, making possible to decrease their power consumption and lower their dissipation. The interfering single molecule mono-layer can be integrated in today’s chip manufacturing process. Clearly, this is a research result and it will take few more years to see it applied in industrial production (assuming it ever will) but it is nevertheless an amazing result: it has proved that what seemed physically impossible has a way to be circumvented. We have seen this happening in the last fifty years with the Moore’s law. There seemed to be impossible physical barriers precluding further advances and somehow researchers found a way around the roadblock.
Now they have cheated the quantum tunneling!

About Roberto Saracco

Roberto Saracco fell in love with technology and its implications long time ago. His background is in math and computer science. Until April 2017 he led the EIT Digital Italian Node and then was head of the Industrial Doctoral School of EIT Digital up to September 2018. Previously, up to December 2011 he was the Director of the Telecom Italia Future Centre in Venice, looking at the interplay of technology evolution, economics and society. At the turn of the century he led a World Bank-Infodev project to stimulate entrepreneurship in Latin America. He is a senior member of IEEE where he leads the New Initiative Committee and co-chairs the Digital Reality Initiative. He is a member of the IEEE in 2050 Ad Hoc Committee. He teaches a Master course on Technology Forecasting and Market impact at the University of Trento. He has published over 100 papers in journals and magazines and 14 books.