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Going down to femtoseconds and picoseconds

A new storage architecture enabling ultra fast read-write. A cobalt layer on top of a gadolinium-iron alloy allows for switching memory with a single laser pulse in just 7 picoseconds. The discovery may lead to a computing processor with high-speed, non-volatile memory right on the chip. Credit: Jon Gorchon et al./Applied Physics Letters

DRAM chips, the ones in your laptop storing bits using capacitors inside a chip, are pretty good in terms of speed. They have a switching time in the order of 2 nanoseconds, that it the time it takes a beam of light to cover 60cm. And, remember, light travels really fast!

Now imagine that same beam of light traveling for 0.3µm (0.3 millionth of a meter): that correspond to a time of a femtosecond and in that time a pulse of a laser can activate the a memory switch (from 0 to 1 or vs), with the switch itself taking a few picoseconds, that is the time it takes light to travel a mm.

This is what researchers at Berkeley and their colleagues at Riverside have managed to achieve.  The problem with RAM (Random Access Memory) and their siblings, like DRAM (Dynamic RAM) is that they need to be continuously powered otherwise they lose the data. This, in turns, requires energy and drain the battery.
An alternative is to use magnetic memory, magnetism is persistent, not like an electron charge that goes away unless you keep it where it is. The downside is that magnetic memories are much slower than electric memories.

In a paper published on Science Advances the Berkeley ad Riverside researchers present a magnetic memory based on Gadolinium (Gd, atomic number 64, a rare earth metal) with a much faster switching rate. Furthermore they have managed to activate the switching (that is the writing of a bit) using a 1 femtosecond laser pulse by overlaying a layer of cobalt. The actual switching requires 7 picoseconds.

Bringing this type of memory to the market means decreasing the need for power in line with the growing need of processing on the move.

About Roberto Saracco

Roberto Saracco fell in love with technology and its implications long time ago. His background is in math and computer science. Until April 2017 he led the EIT Digital Italian Node and then was head of the Industrial Doctoral School of EIT Digital up to September 2018. Previously, up to December 2011 he was the Director of the Telecom Italia Future Centre in Venice, looking at the interplay of technology evolution, economics and society. At the turn of the century he led a World Bank-Infodev project to stimulate entrepreneurship in Latin America. He is a senior member of IEEE where he leads the New Initiative Committee and co-chairs the Digital Reality Initiative. He is a member of the IEEE in 2050 Ad Hoc Committee. He teaches a Master course on Technology Forecasting and Market impact at the University of Trento. He has published over 100 papers in journals and magazines and 14 books.