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Looking for something better, looking for something different

IBM has announced a 3 Billion $ research investment in two projects to push the envelope of silicon based chip manufacturing to 7nm and to find a replacement to silicon below the 7nm through CNT, Carbon Nano Tubes.
In 2014 we might be seeing the 14nm chips getting out of the Intel chip manufacturing plant that has been built over the last few years in Arizona, an investment of 5 billion dollars. As of today, July 2014, industrial chips are based on the 22nm technology.
A roadmap is available for the 10 nm (2018) and the 7nm should become possible in 2020, although significant research work on manufacturing processes is needed. Beyond that the consensus is that one needs to find a replacement to silicon. 
There are a few candidates to replace silicon, the first being CNT. IBM, and others, have already demonstrated chip based on CNT at 50nm scale. More recently IBM has shown a transistor manufactured at 10nm proving that it works fine. This has been made possible by a new processes that yields CNT with a purity of 99.99%.
A bit more down the way there is graphene. Here again the substitution of one atom in the 6 atoms rings of graphene or introducing specific atoms between two layers of graphene can result in a transistor (sandwiching an atom in  two layers of graphene leads to a thickness of less than 0.5nm, although this is just a theoretical sizing).
Other approaches to computation include quantum computing, systems based on the superposition of states of electrons (and lately demonstrated also at the level of a single atom), neurosynaptic computing mimicking the architectures found in the brain where IBM is leading the way with a neuromorphic chip (Synapse) and a new programming language recently opened to developers supporting "non-von Neumann" architectures and Silicon Photonics where communications among transistors in the chip takes place via light pulses.
Although it is difficult to predict if and when these alternatives to silicon based computation will take the upper hand eventually replacing silicon based chips it is clear that to extend the validity of the Moore’s law both in terms of processing capacity, density and lower power consumption radical new approaches are required beyond this decade once the 7nm scale is reached.
There are a few studies, also included in the 3 billion IBM research effort, to further improve CMOS technology with what is known as III-V technologies, new structures based on FET and MOS but these are likely to be used as ways to reach the 7nm scale rather than going further down.
I am looking forward to this evolution with a mix of curiosity and awe at what research can do to overcome what today seems ultimate show stoppers.

About Roberto Saracco

Roberto Saracco fell in love with technology and its implications long time ago. His background is in math and computer science. Until April 2017 he led the EIT Digital Italian Node and then was head of the Industrial Doctoral School of EIT Digital up to September 2018. Previously, up to December 2011 he was the Director of the Telecom Italia Future Centre in Venice, looking at the interplay of technology evolution, economics and society. At the turn of the century he led a World Bank-Infodev project to stimulate entrepreneurship in Latin America. He is a senior member of IEEE where he leads the New Initiative Committee and co-chairs the Digital Reality Initiative. He is a member of the IEEE in 2050 Ad Hoc Committee. He teaches a Master course on Technology Forecasting and Market impact at the University of Trento. He has published over 100 papers in journals and magazines and 14 books.